MAX5138BGTE+T【PDF 6/17 页】IC DAC V-OUT 16BIT 1CH 16-TQFN

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Applications Information

Power-On Reset (POR)

On power-up, the input register is set to zero, and the

DAC output powers up to zero or midscale, depending

on the configuration of M/Z. Connect M/Z to AGND to

power the output to AGND. Connect M/Z to AVDD to

power the output to midscale.

To guarantee DAC linearity, wait until the supplies have

settled. Set the LIN bit in the DAC linearity register; wait

10ms, and clear the LIN bit.

Unipolar Output

The MAX5138/MAX5139 unipolar output voltage range is

0 to VREFI. The output buffer drives a 2k

Ω load in parallel

with 200pF.

Bipolar Output

Use the MAX5138/MAX5139 in bipolar applications with

additional external components (see the

Typical

Operating Circuit).

Power Supplies and

Bypassing Considerations

For best performance, use a separate supply for the

MAX5138/MAX5139. Bypass both DVDD and AVDD

with high-quality ceramic capacitors to a low-imped-

ance ground as close as possible to the device.

Minimize lead lengths to reduce lead inductance.

Connect both MAX5138/MAX5139 AGND inputs to the

analog ground plane.

Layout Considerations

Digital and AC transient signals on AGND inputs can

create noise at the outputs. Connect both AGND inputs

to form the star ground for the DAC system. Refer

remote DAC loads to this system ground for the best

possible performance. Use proper grounding tech-

niques, such as a multilayer board with a low-induc-

tance ground plane, or star connect all ground return

paths back to the MAX5138/MAX5139 AGND. Do not

use wire-wrapped boards and sockets. Use shielding

to improve noise immunity. Do not run analog and digi-

tal signals parallel to one another (especially clock sig-

nals) and avoid routing digital lines underneath the

MAX5138/MAX5139 package.

Definitions

Integral Nonlinearity (INL)

INL is the deviation of the measured transfer function

from a best fit straight line drawn between two codes.

This best fit line for the MAX5138 is a line drawn

between codes 3072 and 64,512 of the transfer func-

tion and the best fit line for the MAX5139 is a line drawn

between codes 192 and 4032 of the transfer function,

once offset and gain errors have been nullified.

Differential Nonlinearity (DNL)

DNL is the difference between an actual step height

and the ideal value of 1 LSB. If the magnitude of the

DNL is greater than -1 LSB, the DAC guarantees no

missing codes and is monotonic.

Low-Power, Single, 16-/12-Bit,

Buffered Voltage-Output DACs

Maxim Integrated

MAX5138/MAX5139

DAC LATCH CONTENTS

MSB

LSB

ANALOG OUTPUT, VOUT

1111 1111 1111 1111

VREF x (65,535/65,536)

1000 0000 0000 0000

VREF x (32,768/65,536) = 1/2 VREF

0000 0000 0000 0001

VREF x (1/65,536)

0000 0000 0000 0000

Table 2. MAX5138 Input Code vs. Output

Voltage

DAC LATCH CONTENTS

MSB

LSB

ANALOG OUTPUT, VOUT

1111 1111 1111 XXX

VREF x (4095/4096)

1000 0000 0000 XXX

VREF x (2048/4096)

0000 0000 0001 XXX

VREF x (1/4096)

0000 0000 0000 XXX

Table 3. MAX5139 Input Code vs. Output

Voltage

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